The TLALOC compiler structure is a very interesting object of study. The fasmg backend is very versatile.
I produced a codi_SX.finc to study the static behaviour of the LLIR stack machine and another codi_TX.finc which assembled gives an emulator friendly simple “txexe” binary format. Then TX_RUN, an emulator written in Ada, executes the txexe with statistics extraction on instructions frequencies, reducible instructions pairs, and so on.
The aim is to study the type of hardware stack machine adapted to TLALOC. Is it a Forth type or a Burroughs type stack machine ?
I haven’t read his works in a while, but when I was working on stack machines more closely, it was helpful for understanding. Things like SECD machines might also be useful too. SLang, POP-11, &c all have usable approaches that could be useful for ideation underneath. Happy to chat more about it as well.
I read Koopman years ago. I found it very interesting. But most Forth stack machines are very simple designs. This is their appeal, but compared to today’s processor performance standards they are “naïve” implementations.
With tx_run I explore single or double flux executions with stack renaming, branch predictions and so on of a LLIR hardware support specification following the codi structure.
With tests on a 7 G instructions compilation by tx_run interpreter supervised TLALOC.txexe of the biggest compiler package (expander-expressions.adb), it seems a 5 IPC level of performance with a mean of 2.5 byte per instruction is achievable.